Pixel 10 and 11 chip details revealed in massive Google leak

Since Google switched to the custom Tensor chips in its Pixel series, some have complained about the mediocre battery life and poor heat they provided. This was in large part due to Google’s decision to task Samsung (more specifically its S.LSI division) with handling many parts of the chip creation process, including manufacturing. Long story short, Samsung’s recent process nodes tend to perform worse than those of its rival TSMC.

Fortunately, Google will soon correct this mistake by ditching Samsung and designing the upcoming chips in-house. That is why Google will finally switch to TSMC, which we confirmed earlier. However, one thing remained unclear: exactly what process would be used. Today we can answer that question, not only for the Pixel 10’s Tensor G5, but also for the Tensor G6!

Thanks to an unprecedented leak from Google’s gChips division, Android Authority has reviewed credible documents confirming the new process nodes for Google’s upcoming chips.

Not 2nm, but still a great upgrade

Google Tensor G5 (codename “laguna”), likely the chip in next year’s Pixel 10 series, will be manufactured on TSMC’s 3nm class N3E – the exact same process node Apple uses for the A18 Pro from the iPhone 16 Pro and are M4 chips. This is great news as it is probably the best process node currently available and will certainly be a huge upgrade over Samsung’s 4nm class 4LPE node used in the Tensor G4, both in terms of efficiency and performance.

Probably the more interesting part of this leak, however, is the fact that the 2026 Tensor G6 (codenamed “malibu”) will be manufactured on TSMC’s upcoming N3P node, the same one that will reportedly be used for Apple’s A19 chip. While still a 3nm class node, it brings some improvements: the documents we looked at include a graph summarizing the changes. We cannot share the original page. However, we have recreated it below:

This can be a bit confusing, so let me provide some additional context: PPA stands for ‘Power, Performance, Area’, the three main components of each process node. The “Freq (@iso-lkg)” figure, with a 5% improvement, shows how much the frequency can be increased (which translates almost directly into performance) without affecting other characteristics of the chip (in this case, leakage , which is a concept far too complex to explain here). The second number is ‘Power (@iso-freq)’, which shows how much power consumption can be reduced if the frequency remains the same, in this case by 7%. It is important to know that these two values ​​are not additive: they involve an improved frequency or energy consumption. The last value (“Area”) indicates how much smaller a completed ship can be, in this case 4%.

In summary, the Tensor G6 will also feature significant improvements to its process node, even if it is not 2nm as previously rumored.

The use of both process nodes shows that Google is getting serious about its upcoming Tensor chips. The previous generations were always behind in terms of the technology they used, and using a modern process node is certainly a good step to make them more competitive.

This is the first part of the series where we will discuss the massive Pixel leak. We will release more information soon, so stay tuned!